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MAX1887EEE Rev. A
RELIABILITY REPORT FOR MAX1887EEE PLASTIC ENCAPSULATED DEVICES
March 6, 2003
MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord Quality Assurance Reliability Lab Manager
Bryan J. Preeshl Quality Assurance Executive Director
Conclusion The MAX1887 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments
I. Device Description A. General The MAX1887 step-down slave controller is intended for low-voltage, high-current, multiphase DC-to-DC applications. The MAX1887 slave controller can be combined with any of Maxim's Quick-PWMTM step-down controllers to form a multiphase DC-to-DC converter. Existing Quick-PWM controllers, such as the MAX1718, function as the master controller, providing accurate output voltage regulation, fast transient response, and fault protection features. Synchronized to the master's low-side gate driver, the MAX1887 includes the Quick-PWM constant on-time controller, gate drivers for a synchronous rectifier, active current balancing, and precision current-limit circuitry. The MAX1887 provides the same high efficiency, ultra-low duty factor capability, and excellent transient response as other Quick-PWM controllers. The MAX1887 differentially senses the inductor currents of both the master and the slave across current-sense resistors. These differential inputs and the adjustable current-limit threshold derived from an external reference allow the slave controller to accurately balance the inductor currents and provide precise current-limit protection. The MAX1887's dual-purpose current-limit input also allows the slave controller to automatically enter a low-power standby mode when the master controller shuts down. The MAX1887 triggers on the rising edge of the master's low-side gate driver, which staggers the on-times of both master and slave, providing out-of-phase operation that can reduce the input ripple current and consequently the number of input capacitors. B. Absolute Maximum Ratings Item V+ to GND VCC, VDD to GND PGND to GND TRIG, LIMIT to GND ILIM, CM+, CM-, CS+, CS-, COMP to GND DL to PGND BST to GND DH to LX LX to BST Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70C) 16-Pin QSOP Derates above +70C 10-Pin uMAX Rating -0.3V to +30V -0.3V to +6V 0.3V -0.3V to +6V -0.3V to (VCC + 0.3V) -0.3V to (VDD + 0.3V) -0.3V to +36V -0.3V to (VBST + 0.3V) -6V to +0.3V -40C to +85C +150C -65C to +150C +300C 667mW 8.3mW/C
II. Manufacturing Information A. Description/Function: B. Process: C. Number of Device Transistors: D. Fabrication Location: E. Assembly Location: F. Date of Initial Production: Quick-PWM Slave Controllers for Multiphase, Step-Down Supplies S12 - Silicon Gate 1.2 micron CMOS 1422 Oregon or California, USA Malaysia, Thailand or Philippines October, 2001
III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire: F. Mold Material: G. Bonding Diagram H. Flammability Rating: 16-Lead QSOP Copper Solder Plate Silver-filled epoxy Gold (1.3 mil dia.) Epoxy with silica filler 05-3801-0006 Class UL94-V0
I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: Level 1
IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 86 x 91 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) Aluminum None 1.2 microns (as drawn) 1.2 microns (as drawn) 5 mil. Sq. SiO2 Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager Bryan Preeshl (Executive Director of QA) Kenneth Huening (Vice President) 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects.
B. Outgoing Inspection Level:
C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate () is calculated as follows: = 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 4389 x 80 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV = 13.57 x 10-9 = 13.57 F.I.T. (60% confidence level @ 25C)
This low failure rate represents data collected from Maxim's reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples rom production to assure reliability of its processes. The f reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The attached Burn-In Schematic (Spec. # 06-5881) shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR1M). B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The PD13 die type has been found to have all pins able to withstand a transient pulse of 2000V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA.
Table 1 Reliability Evaluation Test Results MAX1887EEE
TEST ITEM TEST CONDITION FAILURE IDENTIFICATION PACKAGE SAMPLE SIZE NUMBER OF FAILURES
Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. Moisture Testing (Note 2) Pressure Pot Ta = 121C P = 15 psi. RH= 100% Time = 168hrs. Ta = 85C RH = 85% Biased Time = 1000hrs.
DC Parameters & functionality
80
0
DC Parameters & functionality
QSOP
77
0
85/85
DC Parameters & functionality
77
0
Mechanical Stress (Note 2) Temperature Cycle -65C/150C 1000 Cycles Method 1010 DC Parameters 77 0
Note 1: Life Test Data may represent plastic D.I.P. qualification lots. Note 2: Generic package/process data
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/
Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except VPS1 3/ All input and output pins
Terminal B (The common combination of all like-named pins connected to terminal B) All VPS1 pins All other input-output pins
1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 a. b. Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., V , or V SS1 SS2 or V SS3 or V CC1 , or V CC2 ) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
c.
TERMINAL C
R1 S1 R2
TERMINAL A REGULATED HIGH VOLTAGE SUPPLY
S2 C1
DUT SOCKET
SHORT CURRENT PROBE (NOTE 6)
TERMINAL B
R = 1.5k C = 100pf
Mil Std 883D Method 3015.7 Notice 8
TERMINAL D
ONCE PER SOCKET
ONCE PER BOARD
6.2 OHMS
+5V
47 K 10 K 0.1 uF 4.7 K
+20V
15 K 0.1 uF
20 1 2 3 4 5 6 7 8 9 10 19 18 17 16 15 14 13 12 11
0.1 uF
DEVICES: MAX 1897 PACKAGE: 20-QFN MAX. EXPECTED CURRENT = 2mA (+5V), 0.1mA (+20V)
DRAWN BY: TEK TAN NOTES:
DOCUMENT I.D. 06-5881
REVISION A
MAXIM
TITLE: BI
Circuit (MAX1897)
PAGE
2
OF 3

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